We are looking for a qualified and professional individual to join the Silvaco Cell Library, ASIC Block and SRAM Characterization group.
You will work together with R&D on new feature implementation as well as on maintenance of the existing code.
M.S. or Ph.D. with specialization in Electrical Engineering / Computer Science or related major. Solid knowledge of Mathematical Physics and Numerical Algorithms.
Solid knowledge and extended industry experience in C, C++, STL (Standard Template Library), Tcl. Clear understanding of Object Oriented Design Patterns and good software design principles.
Preferred experience with multithreading programming and client-server architecture.
Solid knowledge of Digital Electronic Design, clear understanding of Static CMOS Logic and SRAM Memory.
Solid hands-on experience with SPICE, HSPICE or SPECTRE electric circuit simulators.
Preferred experience with post-layout Cell Characterization - Timing, Input Constraints, Power and Noise.
Preferred experience with STA (Static Timing Analysis).
Ключевые навыкиC, C++, STL, Tcl, Object Oriented Design Patterns
Полная занятость, полный день