Senior Field Application Engineer

з/п не указана

Вакансия в архиве

Работодатель, вероятно, уже нашел нужного кандидата и больше не принимает отклики на эту вакансию

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Требуемый опыт работы: более 6 лет

Полная занятость, гибкий график

The selected candidate for this position is an experienced engineer that enjoys working with customers to develop solutions for their ASIC/SoC designs using the Synopsys Verification Tools. This is a pre-sales role for an expert with ASIC/SoC, FPGA design or verification experience and is committed to the success of our customers.

General responsibilities include:

· Collaboration with the Sales & RnD teams to identify and understand our customers’ technical & business challenges. Develop appropriate strategies & solutions for customers, leveraging the broad Synopsys Verification portfolio.

· Supporting engagements via on-site or remote technical interactions, discovery meetings, analysis of customer requirements, providing product demonstrations, supporting product evaluations.

· Providing post-sales technical expertise during the installation, deployment and maintenance of Synopsys Verification products in our customers´ projects. Providing product training, support for general product usage, technical issue resolution, addressing competitive challenges, managing and tracking issues reported by customer.


· Bachelor´s or Master´s degree in Electrical Engineering or Computer Science with 3-5 years of experience in functional verification (ASIC, SoC, FPGA etc.)

· Experience with digital logic simulation and debugging techniques

· Strong knowledge of Verilog and SystemVerilog languages

· Knowledge of timing constraints & synthesis in ASIC design

· Proficient with C/C++, Linux

· Fluent in English and Russian: spoken and written is mandatory

· Strong technical communication skills are required

Nice to Have:

· Prior experience in an application engineering or another direct customer facing role

· Basic understanding of SoC design implementation

· Familiar with Analog/Mixed-signal design and verification flows.

· Problem-solver and customer-oriented with the ability to multi task & set priorities

· Self-driven & team-player

Please note that only applications in English will be considered.

Ключевые навыки

Verilog HDLASIC designSystemVerilogC/C++


Москва, Смоленская площадь, 3

Вакансия опубликована 26 июля 2019 в Москве

Код вакансии 21637BR

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